Worst-Case Execution Time Estimation for Numerical Controllers

The current paper proposes a worst-case execution time (WCET) estimation and analysis necessary in rapid control prototyping, as a verification step before automatically generating Embedded C/C++ production code, which can directly suggest the minimum necessary specifications for a microcontroller unit (MCU) capable of implementing the desired control law. The computational model is thought to encompass general linear-time invariant (LTI) control structures, such as state-space realizations and infinite/finite impulse response (IIR/FIR) filter topologies, along with relevant nonlinear phenomena usually implemented alongside them, such as signal scaling, saturation and anti-windup techniques. Starting from an established control structure and its related coefficient values, the proposed mathematical model focuses on the conversion between the theoretical mathematical operations and actual low-level interrupt service routine (ISR) logic which implements said closed-loop controller.