FD/DG-SOI MOSFET-a viable approach to overcoming the device scaling limit

From a practical fabrication point of view, FD/DG-SOI MOSFETs were examined as deep-sub-tenth /spl mu/m devices. Solutions for the critical issues of ultra-thin layer resistance, threshold voltage control, and double-gate formation were discussed with respect to the device scalability. By showing the feasibility of FD/DG-SOI based on the experimental data, it was made clear that FD/DG-SOI would become a viable approach to overcoming the CMOS scaling limit.