Sampling Rate Conversion Techniques- A Review

In the recent few years, it is observed that in wireless communication there has been a rapid growth in terms of different communication standards/ technologies being used. Thus, to support different communication standards, flexible system should be used to convert the digital signal from one sample rate to another (up sampling or down sampling). The solution is the use of Software defined Radio (SDR), which is a reconfigurable radio communication system. Therefore the most critical and demanding element in the digital signal processing chain of an SDR is the Sample Rate Converter. At high sampling rate, the signals cannot be processed by using baseband signal processing unit. Instead of any unique air-interface, SDR simultaneously handles multiple air-interfaces of different wireless standards that require sample rates for baseband processing. Thus, in SDR, Sampling Rate Conversion (SRC) is an important functionality to provide synchronization between the ADC and baseband signal processor. This paper provides a review on various types of SRC circuits, where their design characteristics are analyzed and compared. The review is based on designing of Sample Rate converters on Field-Programmable Gate Array (FPGA) and Applications Specific Integrated Circuit (ASIC) platform. For FPGA based design, LUT, slices, FFT, and other hardware resource parameters are estimated to evaluate their performance. For ASIC, area, power and delay are considered for performance evaluation.