Positive-Bias Stress Stability of Solution-Processed Oxide Semiconductor Thin-Film Transistor

In this study, we investigated the positive bias stress (PBS) stability of solution-processed oxide semiconductor thin-film transistors (TFTs) under different stress gate voltages and temperatures. PBS tests induced a positive shift of turn-on voltage (
${V}_{\mathrm{\scriptscriptstyle ON}}$
) that was dependent on both stress voltage and temperature. The
${V}_{\mathrm{\scriptscriptstyle ON}}$
versus stress time data were fit very well by the stretched exponential model, resulting in estimated average energetic barrier heights to be 0.5–0.6 and 0.9–1.0 eV for stress and recovery processes, respectively. We also analyzed the data using a thermalization energy analysis method and found estimated barrier heights that agree with the stretched exponential model fitting. After scrutinizing several possible microscopic mechanisms, we attributed the PBS instability to the deep interface traps at the interface between the channel and the gate insulator. The significantly higher barrier height during recovery than that of the stress process indicates a redistribution of trapped electrons toward deeper states, as implied by the stretched exponential model.