Coin classification using Xilinx System Generator

Computer vision systems usually require a large amount of arithmetic processing to get the required information. Field-Programmable Gate Arrays (FPGAs) can be programmed to easily modify their internal logic functions to achieve high-speed hardware processing and parallel operations, making them a more convenient solution for high-performance embedded vision systems. The power consumption of FPGA-based embedded vision systems is much lower than that of traditional Central Processing Unit (CPU)-and Graphics Processing Unit (GPU)-based vision systems, and System Generator, jointly introduced by MathWorks and Xilinx, reduces the need to implement algorithms for image processing using hardware description languages (HDLs). In this paper, by using Xilinx System Generator (XSG) in a FPGA to implement some algorithms for coin classification, including coin image interference background removal, binarization, etc. This coin classification scheme is verified and validated by using XSG in Matlab/Simulink.