Performance Optimization in Recessed Modified Junctionless FET

In this paper, a recessed modified junctionless field-effect transistor is designed that has less off current value. Leakage current is an undesirable phenomenon in nanometer devices. It has almost reached the dynamic power due to the scaling of oxides. There are 2 features in this device that enhance the performance metrics in terms of reduction in leakage current. First, the dielectric layer structure is modified to reduce leakage current in source-channel & drain- channel junction. Secondly, two dielectric materials (high k & low k) are used in gate structure to enhance the capacitance at the source/channel junction and reduce the parasitic capacitance at the drain /channel junction and recessed channel in a junctionless field-effect transistor. In this paper OFF-current, threshold voltage, ON-OFF current ratio, ON-current values of the recessed modified junctionless field-effect transistor have been found for the gate work function values ranging from 4.6 eV to 5.2 eV. The proposed device has an Ioff of 7.25E-19 A/μm, an Ion value of 1.45E-04 A/μm, Ion/Ioff ratio of 2.00E+14.