Pulse Truncation Enabled High Performance and Low Energy Memristor-based Accelerator

Energy consumption and system latency in memristive crossbar arrays become increasingly significant, especially for the ultra-high density memristor based DNN accelerator. A solution is presented in this paper for improving energy efficiency, meanwhile heightening the performance of the DNN accelerator. Specifically, a pulse truncation (PT) method is proposed to reduce number of pulses and not change the original pulse width in every weight update. The DNN accelerator with the PT method is implemented and evaluated based on the fabricated memristor with the active layer - Silver (Ag) and Silicon (Si) and its tested current-pulse characteristics. Different DNN algorithms with various architectures are employed. The experimental results indicate that the PT method cannot only effectively avoid uneven pulse distributions, but also save the writing energy of crossbar array by 8.29%-26.87% and reduce the writing latency by 30%-48%. Finally, considering non-ideal features of memristors, it concludes that even with the significant nonlinearity, many variations, failure rates, and aging effect, the PT method is still much effective.