Power-Efficient MLOA for error resilient applications

Approximate Computing is a paradigm shift to meet the future demands of compute-intensive tasks such as media processing, data mining, and recognition. These applications can tolerate errors up to a specific limit. In such applications, addition is one unit that is power-hungry by approximating the adder savings in area, power, and delay can be achieved. This paper presents a technique of approximating the least significant portion in an adder while improvement in accuracy is achieved using OR-based logic. This results in a reduction of area and power without significant compromise in accuracy. Based on the approximation region, we propose three designs with a tradeoff in computation complexity and accuracy. The results prove the efficacy of the proposed designs and an improvement up to 51.39%, improvement in power w.r.t existing designs.