A 94-GHz Power Amplifier with Transformer-based Two-way Power Combining in 65-nm CMOS

A 94-GHz three-stage differential power amplifier (PA) with transformer-based two-way power combining is designed in 65-nm Silicon-On-Insulator (SOI) CMOS technology. Each PA cell is composed of three-stage differential common source topology to obtain high power gain and high output power. Since the negative feedback path caused by the parasitic capacitance limits power, reverse isolation, and stability, the neutralization capacitor cross connected between the drain and the gate of the differential stage can provide a reverse compensation current to offset the feedback current. Meanwhile, a two-way power combiner is designed to further enlarge the output power. The transformer-based current power combiner has the advantage of channel symmetry, for it can avoid the reduction of power combining efficiency and output power caused by mismatch issues. All impedance matching networks of this PA are implemented by transformers, which can be conveniently connected to differential circuits to ensure the compact layout and reduce extra interconnection losses. The center tap of transformers are used to provide 0.7 V and 1.2 V DC voltages to the circuit. The primary and secondary coils of the transformer with separate physical structures have independent biasing capabilities. The simulation results of PA show a saturated output power of 13 dBm with power-added efficiency (PAE) of 9.7%, the 1-dB compression output power of 10.8 dBm, and gain of 17 dB with a supply voltage of 1.2 V at 94-GHz. The PA is unconditionally stable in the whole working frequency band. The layout size of the power amplifier is 0.57mm
²
, and the core area is 0.213 mm
²
.