Experimental Comparison of 8-bit Digitally Programmable Potentiometers based on Multistage Architectures

This paper presents experimental results obtained for three digitally programmable potentiometers with 50kΩ total resistance and 8 bits of resolution (256 steps) that were implemented in silicon in different technologies. All the potentiometers use distinct multistage architectures. They are compared in terms of measured electrical parameters (nonlinearity errors, total resistance variations and wiper resistance).