A Neurostimulator IC With Impedance-Aware Dynamic-Precision One-Shot Charge Balancing

This letter presents the design, development, and experimental characterization of a current-mode neurostimulator IC with a
safe one-shot
charge imbalance compensation, achieved through real-time energy-efficient interface impedance extraction. Thanks to embedding the compensation adjustments in the individual pulse parameters, the technique guarantees no unintentional stimulation during neutralization, imposes no significant time constraints on the rest periods, and allows for on-the-fly and impedance-aware control on the charge accumulation safety threshold. The balancing circuit consumes
$37.6~\mu \text{W}$
for conducting electrode voltage monitoring, impedance extraction, and neutralization. A 24-channel IC with the proposed charge balancer embedded in each channel is fabricated in a standard 0.18-
$\mu \text{m}$
CMOS technology and is experimentally validated using electrical and
in vitro
measurements and is compared to the state of the art.