Design of low-voltage front-end interface for switched-op amp circuits

Switched-op amp technique is an effective technique for designing low-voltage switched-capacitor circuits. The only drawback with this approach is the difficulty in designing the front-end interface to the external input, In this paper, front-end interface structures with wide signal swing and no voltage boosting are proposed. Based on a conventional 1.2-/spl mu/m CMOS process, a front-end interface was designed and implemented. For a 1-V supply, the interface dissipates 80 /spl mu/W. The track mode THD was measured to be -78 dB for a 600-mV peak-to-peak output suing, and the maximum sampling rate was measured to be 600 kS/s for a capacitive load of 20 pF.