Threshold Voltage Instability of Enhancement-Mode GaN Buried p-Channel MOSFETs

GaN
${p}$
-channel field-effect transistors (
${p}$
-FETs) are essential components for implementing the energy-efficient complementary logic circuitry for monolithic GaN power integration. This letter reports the threshold voltage (
${V}_{\mathrm {TH}}$
) instability of
${p}$
-channel GaN MOSFETs with Al
₂
O
₃
as the gate dielectric. When the gate-to-source bias sweeps toward the negative direction, the
${V}_{\mathrm {TH}}$
exhibits a shift toward more negative values. The impacts of such
${V}_{\mathrm {TH}}$
instability on GaN complementary logic circuits are characterized using logic inverters and ring oscillators. It is shown that impacts on circuit functions are limited with an operating voltage swing below 5 V. However, the propagation delay could be gradually prolonged, as a result of the drifting
${V}_{\mathrm {TH}}$
.