A Divide-by-Three ILFD With Second Harmonic Enhancement

This letter presents a low-voltage divide-by-three injection-locked frequency divider (ILFD) with a second harmonic enhancement technique. The injection current generated from the extra divide-by-two injection path is enhanced compared with the former work, thus the larger locking range (LR). Fabricated in the CMOS 65-nm technology, the core circuit consumes 5.18 mW from a 0.6-V power supply. Under 0 dBm signal injection, the measured largest LR achieves 19.03% ranging from 23.30 to 28.20 GHz without frequency tuning. By using a varactor, the bandwidth can range from 23.30 to 31.02 GHz, which can be used as the first stage frequency division in the phase-locked loop (PLL) of the 5G transceiver.