Experimental of Folded Accumulation Lateral Double-diffused Transistor with Low Specific On Resistance

In power devices, the resistance of the drift region becomes a dominant portion of the total device. In order to reduce the on resistance, the folded accumulation lateral double-diffused MOSFET (FALDMOS) is proposed and manufactured. The drift region of FALDMOS is etched to form the folded surface, which is similar to the FinFET structure. The drift region is surrounded by the extended gate. The electric field of the drift region can be modulated by the extended gate in three-dimensional when the device is turned off. Therefore, the concentration of the drift region can be greatly increased. When the device is turned on, a large amount of electrons can be introduced in the sidewall of the drift region to increase the conductivity, thereby obtaining ultra-low on resistance. The FALDMOS is manufactured by 0.35μm BCD technology and the experimental results show that the specific on resistance of FALDMOS is only 9.3 mΩ•mm
²
, while that of the conventional LDMOS is 36.2mΩ•mm
²
, which is reduced by 74.3% with the same breakdown voltage of 36V. In addition, the current density of FALDMOS is 5 times higher than the conventional LDMOS in the same area.