Optimized Object Detection Method for FPGA Implementation

Technological advancements are growing faster and better. Real-time object detection is still a challenging task in computer vision and image processing algorithms. For this purpose, hardware platforms like Field-Programmable Gate Arrays(FPGAs) play a significant role in the implementation of object detection algorithms. This paper proposes an optimized YOLOv4 object detection algorithm for FPGA implementation. The proposed method involves in the addition of encoder-decoder network followed by Feature Pyramid Network(FPN) in YOLOv4 architecture. This proposed method achieves better accuracy and performance with mean Average Precision (mAP) of 56.7 and 72.58 billion floating-point operations per second (BFLOPs) respectively at nearly 65 fps on MS-COCO benchmark dataset. The results prove that suggested method is favourable for the hardware implementation on comparing with other detection algorithms.