Energy and Power Analysis of Novel Nano Communication System

As predicted by Moore in his law that the transistor density doubles every 24 months but this law seems to be in violation today. Now, new methods of digital logic implementation are in the testing process. One of the latest developments in this field is the implementation of digital logic through Quantum Dots which is an application of Quantum tunnelling phenomenon in the Quantum world. This new technology has many advantages over the traditional method of CMOS logic implementation. Also, many designs of common logical circuits are being proposed daily, but the difference lies in whether these designs are efficient or not. Efficiency is dependent on cell count, cell area, latency, crossovers, complexity, and most importantly energy and power dissipation parameters. A circuit that uses less energy and dissipates less power is considered to be good. In this paper, we have analyzed a parity generator and a parity detector for its energy and power parametric. Also, a comparison is shown between previously designed Parity generators and detectors and the proposed one. After the comparative analysis, it was found that the proposed design was 35% efficient in terms of Energy and Power Dissipation factors.