Impact of Drain Leakage Current on Short Circuit Behavior of GaN/SiC Cascode Devices

The short circuit (SC) behavior of a newly developed GaN-HEMT/SiC-JFET cascode device is investigated in this work. The reverse leakage current through the drain-side PN junction (I
_R
) of the SiC JFET under SC conditions is measured simultaneously during the SC event. I
_R
of the SiC JFET increases to 6.4 A at the end of a 5-μs nondestructive SC pulse. The increase of I
_R
during the SC pulse induces a turning point in the SC current waveform and a dramatic negative threshold voltage shift (>30 V) in the SiC JEFT, resulting in high transient drain-to-source voltage in the GaN HEMT. The underlying mechanism is associated with the increase of local potential in the P-type layer of the SiC JFET with inevitable spread resistance (R
_SPD
). It is suggested that reducing R
_SPD
can improve SC capability and high I
_R
should be considered in SC failure mechanism analysis and the design of external gate resistance of the SiC JFET.