H-Matrix Based Error Correction Codes for Memory Applications

When the proton released due to the decay of radioactive atoms in the chip, strikes the memory, the contents in cell can be altered resulting in soft errors. This phenomenon can be even caused by cosmic rays. As the spacing between the cells is decreasing in the CMOS technology, multiple nearby cells get affected due to radiations. In this work, detection and correction mechanism using H-Matrix for multiple possibilities of double adjacent errors is presented. When 32-data bits are considered, correction of double adjacent errors up to 8 bits are correctable. Double adjacent means two burst errors each with maximum 4 error bits. Using three different parity check matrices, three different H-Matrix based codes with different numbers of parity bits are proposed and comparatively analysed for different parameters.