10.7 A 64GS/s 4×-Interpolated 1b Semi-Digital FIR DAC for Wideband Calibration and BIST of RF-Sampling A/D Converters

The integration of complex DSP functions together with the entire RF-frontend enables software-defined base-station radio and mandates the availability of power-efficient and compact data converters in advanced digital CMOS processes. In a self-calibrated RF sampling ADC-system, a co-integrated digital non-linear post-equalizer (NLEQ) can substantially increase the receiver performance [1], but wideband ADC-calibration also requires a wideband, calibration-free and ultra-linear reference signal source to train the NLEQ-coefficients during a dedicated calibration period, for example at startup, or during maintenance intervals. Another function with renewed importance in complex transceiver systems is the analog built-in-self-test (aBIST) capability [2] to spot-check the performance of data converters and RF-frontend building blocks, for example during scheduled test intervals in the field. In this work, a single-bit calibration-DAC (CALDAC), capable of wideband reference signal and linear sinewave generation at fclk/4 for these applications is presented. With fclk=16GHz and 4×-interpolation, the CALDAC effectively samples at 64GS/s and implements a semi-digital FIR-architecture [3-5].