Emulation of Load Modulated Amplifiers Using Tabulated Load-Pull Data From a Single Amplifier

A method to emulate load modulated power amplifier (PA) architectures is proposed. Based on an iterative procedure, true load modulation trajectories are found using simulated or measured load-pull data from the transistor/branch PA together with the S-parameters of the combiner. Advantageously, real world performance of the complete load modulated PA can be evaluated in the design stage. Thereby, many different combiners and configurations (e.g. biases, transistor size ratios, branch phase differences) can be fully evaluated without having to manufacture anything. Furthermore, the disclosed method utilizes tabulated load pull date, which speeds up evaluation significantly compared to prior art. Hence, a novel powerful tool for PA designers is provided. The technique is demonstrated and verified by emulating a Doherty amplifier and an outphasing scheme at 3.5 GHz using CW signals.