On Pulsed Power Rise Time Dominated by Circuit Inductance

A simplified pulsed power circuit has been investigated by solving the circuit equation. The aim is to analyze the output rise time, which is defined by the time between 10% and 90% of the peak voltage. It was found that a capacitor, which is called the sharpening capacitor, connected in parallel to the load can help in reducing the rise time by as much as 27%. In addition, a negative bias voltage applied on the sharpening capacitor can further reduce the rise time significantly, depending on how much we sacrifice the working voltage of the switch in exchange for the bias voltage. An example shows that, when the bias voltage is 20% of the switching voltage, the rise time is reduced by ~40% from that obtained without the sharpening capacitor.