TFET based 1T-DRAM: Physics, Significance and Trade-offs

The work showcases device physics, the significance and trade-offs of DRAM metrics in a Tunnel Field Effect Transistor (TFET) based 1T dynamic memory. The analysis shows physical phenomenon that governs speed, Power (P), Energy (E), density, Sense Margin (SM), Current Ratio (CR), Retention Time (RT) and Delay (D) of DRAM. The optimal use of biases and device parameters for application specific design results into low values of Write Time (T
_W
= ~0.5 ns), Read Time (T
_R
= ~10 ns) at read bias of 0.8 V with write power (P
_W
) of ~0.1 pW and high RT (~1.9 s at 85 °C) at sub-100 nm gate lengths.