A Transmission-Line-based Phase Shifter for High-Speed, Ultra-Low-Power N-PSK Transmitters

This paper presents a transmission-line-based phase shifter for use in a PSK/APSK ultra-low-power transmitter. In upcoming extreme high-data-rate communications standards, the power consumption of complex digital-to-analog converters will dominate the total power consumption. Therefore, other means have to be found to enable complex modulation schemes while providing high power efficiency. The proposed phase shifter implements a switched delay with only switching transistors and a transmission line, making this a very energy-saving design. It can be applied to any N-PSK modulation with bit depth N by configuring the transmission line length via selecting the appropriate switches. Furthermore, several different modulation depths can be implemented on one chip by using only a set of switches. The design in a 22 nm FDSOI node shows feasibility of the proposed approach with successful QPSK and 8-PSK modulation at 56 GHz and 28 GHz, respectively.