A 2MHz-Bandwidth 11.6-bit ENOB Noise-shaping SAR ADC with 2nd Order Passive Integrator

Instead of active noise-shaping with power hungry amplifiers, a 2
^nd
order passive noise-shaping module with 8-bit asynchronous successive approximation register (SAR) ADC is presented in this paper. This 2
^nd
order passive noise-shaping module only composes of 4 switches and 4 capacitors, which is benefit for chip area saving. In addition, only one noise-shaping module is needed in differential signal processing, while traditional design needs two modules. The three-input comparator has been optimized to decrease kick-back noise. Simulation results show that the ADC achieves 11.6-bit ENOB with 2MHz signal bandwidth and 80MS/s sampling-rate in 45nm CMOS process, and power consumption is 300uW.