DREAMPlace 2.0: Open-Source GPU-Accelerated Global and Detailed Placement for Large-Scale VLSI Designs

Modern backend design flow for very-large-scale-integrated (VLSI) circuits consists of many complicated stages and requires long turn-around time. Among these stages, VLSI placement plays a fundamental role in determining the physical locations of standard cells. Due to increasingly large design sizes, placement algorithms usually require long execution time to achieve high-quality solutions. Meanwhile, developing a placer often needs huge coding effort and tedius tuning, raising the bar of further researches. In this work, we present an open-source placement framework, DREAMPlace 2.0
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, with deep learning toolkit-enabled GPU acceleration for both global and detailed placement optimization to tackle the issues of efficiency and development overhead.