Effect of High Temperature Storage and Harden Accelerated Storage Test on Reliability of Flip Chip Bumps

Because of its excellent electrical performance, small package size, and high input/output (I/O) wire bonding processing capacity, the flip chip packaging technology has become more and more popular. However, mechanical failure often occurs on bumps under extreme stress conditions, which limits the high reliability application of flip chip. In this paper, the influence of both temperature and humidity on flip chip bump reliability were studied. A high temperature storage reliability test (HTST) of 150°C according to GJB548B-2005 and a high accelerated stress test (HAST) under condition A of GB/T 4937.4-2012 have been conducted on flip chip devices. The test results show that the electric resistance changes slightly after 2600h HTST, with an obvious crack propagating within the inter metallic compound (IMC) along the chip side. The daisy chain links have begun to fail after 384h HAST, with the resistance change rate of more than 10%. Similar crack location with a larger growth of IMC has also been observed. This implies that the humidity aggravates the growth of IMC and intensifies the crack growth, leading to the failure of the device.