Simulation Study of GaN-based Trench CAVET with p-Shielded Region

A GaN-based trench current-aperture vertical electron transistor with p-GaN shielded region (PSR-Trench CAVET) is proposed and investigated by using numerical simulations. In compare to traditional trench CAVET, during the off-state, the proposed PSR-Trench CAVET significantly alleviates the peak electric field occurring in the gate oxide by introducing p-GaN shielded region (PSR) and obtains obviously improved breakdown voltage (BV) above 2600V far exceeding 1560V of the conventional counterpart. Systematic analyses are implemented to investigate the effect of the doping concentration (NPSR), thickness (TP) and width (WP) of the PSR on the BV and specific on-resistance (RON). The optimized results with the BV of 2620V and the RON of 4.28mΩ·cm
²
are achieved at N
_PSR
=2×10
¹⁶
cm
^-3
, T
_P
=8μm and W
_P
=2.5μm to improve the device performance. In addition, the electro-thermal simulation is performed under short-circuit conditions, and the Low thermal stress at the interface of GaN/Oxide indicates that the proposed device has superior robustness.