Design and Analysis of Nonvolatile Memristor-based S-R Latch

In this paper, a modified design of memristor-based logic circuits integrated with CMOS components is introduced. Design of a compact and nonvolatile S-R Latch is examined using a general memristor model as the nonvolatile element to store data. The proposed design operates efficiently in both “Set” and “Reset” modes. The simulation results demonstrate that this novel S-R latch design offers better performance in terms of power, non-volatility, and size of the topology compared with other memristor-based designs proposed in the literature. We proved that this design has non-volatile characteristics and is able to store data. This nonvolatile memristor-based S-R latch is a real alternative for future low power applications adding non-volatility.