A Study of Coverlay Coated Microstrip Lines for Crosstalk Reduction in DDR5

Crosstalk becomes a serious problem in microstrip design of printed circuit boards (PCBs) in DDR5. In high-density and high-speed PCBs, widening space or putting shielding between traces to mitigate crosstalk noise may become less effective, because of the limited space. This paper presents a simple and efficient crosstalk reduction approach by using coverlay coated microstrip lines. This coverlay is available in a variety of film and adhesive thicknesses, which is commonly used materials for the resistance welding transform in PCB production. Based on the simulated S-parameters, the FEXT keeps under -40 dB from dc to 16.0 GHz, and more than 24 dB reduction for FEXT at 3.2 GHz can be achieved by using the coverlay technology, in comparison with that of the initial microstrip lines. The measured results show that the peak FEXT voltage with coverlay can be decreased by 83% of that without coverlay. Moreover, when the experimental results are compared with the simulated results, good agreement can be observed, demonstrating the validity of the proposed design.