Digitally-Assisted Peak Detector for Periodic Signal

A high-precision digitally-assisted peak detector (PD) circuit is presented. While conventional analog PD circuits suffer from Process, Voltage, and Temperature (PVT) variation, as well as noise and device mismatch, resolution of the proposed PD is only limited by quantization noise of the digital tracking circuit. At startup, a binary search algorithm is employed to quickly find the signal amplitude. After an initial phase, the proposed digitally assisted PD switches to tracking mode in order to follow the peak of the input signal. Designed for periodic systems, such as Voltage Controlled Oscillators (VCOs) and Amplitude Modulation (AM) detectors, the proposed digitally assisted PD exhibits a total of 2 mVpkpk error. The proposed PD shows very low sensitivity to noise of the analog circuitry due to digital averaging. Moreover, calibration mechanisms have been proposed to detect and remove the offset of comparator circuits. In 0.18μm technology, the implemented peak detector consumes 438.5nW power in the analog section and the digital calibration part consumes 28.52μW.