Edge Termination Design with Strong Process Robustness for 1.2 kV-class 4H-SiC Super Junction V-groove MOSFETs

We have demonstrated 4H-SiC super junction V-groove MOSFETs (SJ-VMOSFETs) with an extremely low specific on-resistance ($R_{on, sp}$) of $0.67 \mathrm{m}\Omega$ cm
²
and with a high blocking voltage (V
B
) of 1170 V [1]. We have adopted double reduced surface junction termination extensions (DR-JTEs) as a new edge termination for the SJ-VMOSFETs in order to deplete the highly doped drift layer and current spreading layer (CSL) over 1x10$^{17} cm^{-3}$. We evaluated the process robustness of the DRJTEs and other conventional edge terminations by using TCAD simulation.