Forward Conduction Instability of Quasi-Vertical GaN p-i-n Diodes on Si Substrates

This article reports trap-related forward conduction instability of GaN quasi-vertical p-i-n diodes grown on a Si substrate. Three hole traps with activation energies of 0.38, 0.60, and 0.70 eV together with one electron trap with an energy level of 0.26 eV under the conduction band were revealed by deep-level transient spectroscopy (DLTS). Pulsed I-V measurements were performed on a device whose traps were prefilled. The rest time durations and OFF-state bias levels and periods were varied to investigate the forward I-V recovery phenomenon, which was highly correlated with the carrier detrapping process inside the device. The detrapping process could be greatly accelerated by a reverse bias or a lifted temperature. An “on-the-fly” resistance characterization was carried out to study the time-dependent carrier release process using short positive voltage pulses. The device was further submitted to switch-on transient assessment to investigate the time resolved dynamic RON evolution. The initial dynamic RON ratio was proportional to the reverse bias level and duration and was gradually decreased after continuous carrier injection until the trapping effects were overwhelmed. With a forward voltage slightly higher than the threshold voltage, it took dozens of milliseconds for the dynamic RON to be equal to its static counterpart. It was found that at 350 K, the ON-resistance ratio could reach unit more rapidly than the room temperature case, indicating mitigation of current collapse of p-i-n diodes and their great potential for high-temperature switching applications.