Chip/Package/Board Co-Design Methodology Applied to Full-Custom Heterogeneous Integration

Heterogeneous integration leads to significant increase in design complexity. We present a modular full-custom chip/package/board co-design environment based on a versatile backbone idea, which has been used successfully in various system-in-package (SiP) designs. We show challenges and solutions for co-design applied to traditional leadframe assembly and packaging (e.g. QFP, QFN, TO, SON, DSO) as well as more recent technologies like FOWLP or laminate BGA and LGA.