Study of Submicron Patterning Exposure Tool for Fine 500 mm Panel Size FOPLP

More-than-Moore approaches to improving system performance have been a hot topic for a decade, starting with 3D-integration using Through-Silicon Vias (TSV) and silicon interposers. Today, Heterogeneous Integration (HI) technologies including Fan-Out Wafer-Level Packaging (FOWLP) with fine Redistribution Layers (RDL) are promising technologies that can deliver benefits not possible with More-Moore scaling alone. Fan-Out devices are required to meet the demands of advanced Graphics Processing Unit (GPU) and Field-Programmable Gate Arrays (FPGA) that require wideband interconnection with memory for Artificial Intelligence (AI) and autonomous driving. Next-generation devices require submicron RDL and large die sizes to enable high-performance computing using GPU and FPGA designs. For large die-size devices, Fan-out Panel Level Packaging (FOPLP) can offer efficiency and cost advantages compared to FOWLP, however FOPLP poses unique technical challenges including the requirement to realize uniform submicron patterning across the entire rectangular panel. To meet this challenge, Canon developed the first 500 mm panel size patterning exposure tool capable of submicron resolution. The new panel exposure tool is equipped with a wide-field projection optics that offer a wide image field (52 mm x 68 mm) and optimum 0.24 NA for sub-micron resolution and a newly developed panel handling system that handles up to 515 mm x 515 mm panels. Die-by-die focus and tilt compensation are necessary to realize submicron patterning and Canon's panel exposure tools adopt a front-end i-line stepper, on-axis optical focus, tilt system for die-by-die focus and tilt measurement. Canon also developed a new panel stage that executes die-by-die focus and tilt compensation. Canon manufactured a debug tool and confirmed the new panel exposure tool advantages for submicron FOPLP high volume manufacturing and in this paper, we will report on the performance of the new submicron patterning panel exposure tool and will introduce technology innovations supporting advanced heterogeneous integration technologies. We will also discuss current and future FOPLP advantages and challenges and will report on FOPLP resolution performance related to slit coater performance, photoresist materials and the flatness of panel substrates.