Impact of Drain Engineering on RF Performance of Nano-scale FD-SOI-MOSFET

The paper puts forward an effect of drain-engineering on RF performance of nano-scaled FD-SOI MOSFET. The drain engineering involves implementation of lightly-doped region underneath the heavily-doped region. This arrangement leads to reduction in the parasitic capacitances which has a direct correlation with the device leakages. The key figure of merits (FOMs) used in the analysis are intrinsic-capacitances, transfer-conductance (g
_m
), transfer-conductance frequency product (TFP), transfer-conductance generation factor (TGF), gain frequency product (GFP), transition frequency (f
_T
) and gain frequency transfer-conductance product (GTFP). The analysis is carried out by using Atlas (SILV ACO) simulator.