Study on A Novel Trench LDMOS with Double Deep Trenches and Superjunction

A novel deep-trench lateral double-diffused MOSFET (DT-LDMOS) fabricated on a silicon-on-insulator (SOI) substrate is proposed and investigated by TCAD simulations. Different to the previous DT-LDMOS, the proposed one features another one deep-trench to divide the previous drift region into two separated ones on the source side. Each drift region is adjacent to a p-pillar, and functions a little differently. One part is a structure of super-junction contributes to a decrease in the specific on-resistance (Ron,sp). The other part is mostly devoted to introducing peak values of the electric field for an enhancement on the breakdown voltage (BV), although it conducts electron currents as well. The latter part also diminishes the effect of electric flux from the drain on the former for a relatively even distribution of electric field in the super-junction. Attributed to the above aspects, the proposed device has an improved relationship between Ron,sp and BV. According to the simulation results, in comparison with the previous DT-LDMOS at the approximate BV of 580 V, the proposed one obtains the Ron,sp decreased by 16% and the figure of merit (FOM, judging by BV
²
/ Ron,sp) increased by 21%, which indicates a better electrical characteristics and breaks through the silicon limit.