Design and Investigation of FRT Schemes for Three-Phase Grid-Tied PV System

This paper presents a newly designed fault-ride-through (FRT) scheme i.e. bridge-type fault-current limiter (BFCL) for Grid-Tied photovoltaic system (PVS) to optimize unbalance fault variables. A 100 kW three-phase Grid-Tied MATLAB/Simulink model is used to analyze the system response during unbalance conditions. The simulation results of designed FRT scheme are critically compared with conventionally adopted FRT scheme i.e. crowbar circuitry. However, for inverter control proportional integrator (PI) controller is used. Moreover, the analysis is carried out for faults at point of common-coupling (PCC) as well as 5-km away from PCC. The obtained simulated results of PI controller with well-designed FRT scheme authenticates stable, minimum oscillation, ripples free, robust and fast performance for unbalance fault variables as compared to previous work.