Topology and Voltage-Balance Control of a Single-Phase Double T-Type Seven-Level Inverter

This article provides a comprehensive analysis for a single-phase double T-type seven-level (SDT-7L) inverter topology with only eight power switches and three series-connected capacitors. Compared to the existing single-phase seven-level inverters, the number of power switches and the voltage stresses across them are both reduced. These advantages are achieved by a simple topology configuration without any clamping diodes or flying capacitors. However, this makes it difficult to realize voltage-balance control for the three series-connected capacitors as there are no redundant switching states that can be selected to control and balance the three capacitor voltages. Hence, the capacitor voltage imbalance mechanism of the SDT-7L inverter is studied and revealed that the overdischarge of the middle capacitor is the main cause of the capacitor voltage imbalance issue. To overcome this issue, a variable-carrier-amplitude-based voltage-balance control method and a variable-reference-amplitude based voltage-balance control method are proposed in this article. Both the methods aim at controlling the middle capacitor voltage at the desired 1/3 of the full dc-link voltage, and the other two capacitor voltages are automatically balanced. Furthermore, a theoretical analysis indicates that the proposed two voltage-balance methods are equivalent. Both the simulation and experimental results are presented to verify the SDT-7L topology with the proposed two voltage-balance methods.