Machine Learning-based Prediction for Dynamic Architectural Optimizations

Embedded system complexity is rapidly evolving, becoming more desktop-system-like, requiring more complex optimization methods to adhere to more stringent design constraints (e.g., area, thermal pressures, performance, battery lifetime, etc.) given restricted resources, widely varying applications, and environmental stimuli. Configurable architectural parameters (e.g., voltage, frequency, pipeline depth, cache specifics, etc.) can be specialized to meet these application-specific constraints and requirements (e.g., available parallelism, cache locality and access patterns, etc.) based on the available resources (e.g., heterogeneous cores with different architectural parameters). Unfortunately, due to this environmental-and application-dependent information, embedded system designers are challenged with meeting constraints and requirements with no a priori knowledge of this dynamic runtime information, which results in a very large dynamic design space. In this work, we propose a machine-learning-based method to meet these runtime optimization challenges using a fast and reactive methodology. Our methodology uses offline feature selection and neural network training to create a model that can be used online to predict the best configurable parameter values based on unknown runtime applications, environmental stimuli, resource availability, user expectations, etc. Without loss of generality, we propose a cache line size online/dynamic prediction module. Results show that our prediction module achieves 86% and 91% classification accuracies, comparable to prior work, for predicting the instruction and data cache line sizes, respectively, and achieves average energy consumption optimizations within 1% of the applications' optimal energy consumptions determined using exhaustive simulation.