A SoC-ZYNQ-Based SW-HW Co-Simulation and Verification Method

An architecture enabling a flexible on-board simulation and verification method for complex user-specific IPs is presented. The proposed method relies on an FPGA-SoC implementation of a golden simulation and verification model, properly optimized for simplicity and efficiency. It is designed to facilitate the integration of any VLSI-intended circuit into the FPGA-SoC board by a simple drag-and-drop fashion. Exploiting the SoC architecture of Xilinx Zynq-FPGA boards, the proposed method can also be used for SW-HW co-simulation flows by data-transferring between a Host-PC SW environment and the VLSI user's circuits. The data-exchange is based on an Ethernet connection between the host and the ARM Processor on the Zynq FPGA platform. The performance of a digital baseband transceiver system incorporating VLSI IPs of interest has been studied using the flexibility and reliability of the proposed hybrid SW-HW modelling method.