Study on the Embedded Flexible Hybrid Stack Package using Polymer Elastic Bump Interconnection Method

In this study, polymer elastic bump (PEB) bonding process is suggested newly, which could reduce stress concentration remarkably near bump and chip face by soft polymer bump material with electro-conductive metal line pattern and usage of non-conductive adhesive film (NCF) and also lower bonding temperature during face down interconnect process between flexible substrate and ultra-thin chip. Elastic deformation and restoration behavior of PEB bump during bonding process are investigated using FEM analysis to calculate bump-to-pad contact area related to electrical contact resistance and verified them with respect to bonding force and temperature variation using micro tribometer. Through experiments, we find optimal bonding conditions and effect of bonding parameters such as bonding force, time and temperature. As bonding force increases up to 0.5N/bump, soft PEB is deformed elastically more and more. As result of that, contact area between PEB and metal pad is larger and kelvin resistance is lower below 4.75mN. The PEB exhibited nearly 100% elastic deformation and restoration at room temperature. However, as the temperature increased, the plasticity increased and plastic deformation gradually increased. In order to solve the Au cap metal line crack problem due to excessive deformation of PEB, spiral type and spoke type PEB are developed. In order to achieve high integration and smaller form factor of flexible semiconductor packages, a flexible semiconductor package of 2 stack was developed. The bending fatigue test of the flexible semiconductor package using PEB bumps was carried out and no change in daisy chain resistance occurred at 500,000 cycles at a bending radius of 10 mm.