Low-Power Circuit for Measuring and Compensating Phase Interpolator Non-Linearity

In this paper, we propose a novel circuit and technique to measure and pre-compensate for the differential and integral non-linearities (DNL and INL) of phase interpolators (PIs). The circuit can be used in Serializer/De-serializer (SerDes) and phase interpolator-based clock recovery circuity. The test circuit, implemented in 28 nm FD-SOI technology as part of optical transceiver, shows that the solution enabled a reduction in system total jitter.