MLP on FPGA: Optimal Coding of Data and Activation Function

An efficient coding leading to the implementation on FPGA of an optimal architecture of a multilayer Perceptron is proposed. The implementation of this architecture meets the requirements of embark, on the one hand by minimizing the consumed power, the execution time, the logical resources used, etc ..) and on the other hand by ensuring the portability of the computer application (the ability of the latter to run on different platforms and environments). Massive parallelization, efficient coding of the sigmoid and pipeline processing are used. The neuronal approach developed and implemented on FPGA was evaluated in the context of the application on objective criteria according to the two aspects of software and hardware. The results obtained are in line with expectations and objectives.