Developments in the Use of Amorphous Carbon Based Coating Materials as Electrically Insulating, Thermal Interfaces for Heat Spreaders in Ruggedized Electronics Applications

The performance of electronic applications used in extreme temperatures and ruggedised environments can be constrained by the operating temperature of the microprocessor device. Without an efficient thermal management path the operation of the microprocessor can be limited to 30-40% of its operating capacity in these environments. Traditional methods of dissipating heat rely on heat pads or spreaders, usually made of copper or aluminium placed in contact with the top surface of the microprocessor and linked either directly or via heat pipes to the outside environment via the housing. Whilst this ensures a potentially good thermal path it does not guarantee good electrical isolation which is necessary to prevent shorting. The commonly adopted solution is the use of thermal pastes which whilst providing electrical insulation only offer at best reasonable thermal conduction and hence become the limiting factor in the heat path. In addition, these thermal pastes are transient; in other words, they can move about under load and vibration and eventually be completely displaced from the target area leading to short circuiting of the device.As reported in previous work
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, a thick, hard and well adhered amorphous diamond coating is a viable material for such applications and is commercially available through Diamond Hard Surfaces Ltd. The work reported in this paper looks at a new form of amorphous coating designed for applications requiring electrical resistance whilst operating at voltages in excess of 500V combined with the use with new MMC (Metal Matrix Composite) materials with potentially better conduction characteristics than Copper or Aluminium as substrates. The paper discusses the experiments undertaken to look at the development of a new amorphous coating using the PA-CVD process and the outcome of tests carried out of the material itself and in situ on test boards.