Paralleling GaN switches for low voltage high current half-bridges

Low switching energies render GaN semiconductor switches a promising technology for hard-switched inverters. For high current applications, the parallel connection of multiple GaN devices makes the PCB and gate drive design challenging. Furthermore, the SMD packages of currently available GaN devices exacerbate a mechanically robust and at the same time thermally and electrically highly conductive integration of the switches into the overall converter. This paper quantifies the performance improvements of GaN FETs over Si MOSFETs and investigates implications of paralleling GaN on the gate drive design. Based on a low voltage high current GaN halfbridge cell, dv/dt -induced turn-on and oscillations of parallel switches are evaluated theoretically and experimentally. Design recommendations for the gate drive and the integration of such a cell into the overall converter are presented.