Convolutional Neural Network and Maxpooling Architecture on Zynq SoC FPGA

In recent year, the advancement of artificial intelligence applications require a dedicated processor with high computational power, architecture flexibility, and small design size, as well as low power. This paper aims to present a configurable convolutional neural network (CNN) and max-pooling processor architecture that is suitable for small size SoC (System On Chip) implementation. The processor is designed as IP core in SoC system. Architecture flexibility is achieved by implementing the system in both hardware and software. Therefore the system is implemented in Zynq 7000 FPGA bases SoC. The system functionality is verified by implementing CNN and Maxpooling algorithm in the proposed FPGA.