Software Simulation Error Injection in RAM on RISC-V of PolarFire FPGA

Based on the integrated RISC-V hardware platform architecture, this paper implements the monitoring and counting of some SEU in the on-chip RAM area by software, and performs single-particle irradiation test and software simulation in the real heavy ion environment. The SEU event that occurs during the operation of the analog device is implemented in two ways. At the same time, according to the test results, the software is further tested and analyzed, and the feasibility and effectiveness of the proposed method are verified. It provides a new measurement method for improving the reliability of software operation.