Characterization of Process-Induced Nonuniformity Using Asymmetric Metal–Insulator–Semiconductor Capacitive Test Structure

For most large-area applications, spatial nonuniformity of transistor characteristics makes it difficult if not impossible, to achieve adequate performance. Nonuniform parameters may lead to variations in color or gray level, which is commercially not viable. A variation in threshold voltage, mobility or I-V characteristics of an organic thin-film transistor (OTFT) in a pixel circuit can result in unacceptable variation in the current driving the organic light-emitting diode (OLED) which accounts for large nonuniformities in the pixel brightness. Given its importance, a fast and straightforward method for characterization of device variations would be of great help in the process development and optimization. In the present work, a simple, easy to fabricate two-terminal asymmetric metal- insulator-semiconductor (AMIS) capacitive test structure is proposed for quick and accurate characterization of the process-induced nonuniformities in mobility, threshold voltage, and drain current. The capacitance-voltage (C-V) characteristic of the proposed AMIS structure is derived mostly from the channel, and its contribution to the total capacitance at any given frequency depends on channel properties including mobility and threshold voltage. At low frequencies, the C-V characteristics become independent of the series resistances, and hence, complex techniques can be sidestepped for accurate estimation of channel properties. The simulation results are presented to demonstrate the concept using a single AMIS test structure. The experimental results obtained with top contact pentacene based on AMIS arrays are presented to show the concept and advantages of the proposed structure.