Evaluation of the Impact of Four-Degree Off-Axis Wafers on Silicon Stress Sensors

Piezoresistive stress sensors have been shown to represent a powerful tool for experimental evaluation of die stress distributions. However, many silicon devices and ICs have been fabricated on wafers that are deliberately cut four degrees off one of the fundamental crystallographic axes, whereas the analysis and design of stress sensors on these materials have blindly assumed that the wafer surface is perfectly aligned with the crystallographic axes. (In addition, one can always expect an error in the actual cut relative to the theoretical direction.) In the past, the impact of rotational alignment errors within the plane of the stress sensors has been discussed, but potential errors in the piezoresistive coefficients caused by an additional four-degree wafer surface tilt have not been included. These errors can affect both the results from calibration experiments as well as the stresses extracted during application of sensor rosettes. In this work, we will discuss the theory and review the coordinate transformation for the piezoresistive coefficients of silicon. The piezoresistive coefficients for the tilted wafer plane are evaluated and compared with the on-axis case. The impact of the tilted wafer plane on stress measurement is discussed.